Engineering that ships
before graduation day.
Class of 2024 — all branches combined
Per annum, full-time roles only
Active in last placement cycle
Student-led, industry co-authored
DATA AUDITED BY KPMG INDIA · FY2024 · NAAC A++ ACCREDITED · AICTE APPROVED
Four years, mapped as a system.
Cards evolve as you scroll — from foundation blueprints to signed offer letters. Each row is a real semester.
Semester I — II
Foundation & Lab Orientation
Engineering Mathematics I
Calculus, Linear Algebra, ODEs
Physics for Engineers
Wave optics, electrostatics, semiconductor lab
Computational Thinking
Python, algorithms, complexity basics
Engineering Drawing & CAD
AutoCAD, SolidWorks intro, GD&T
Circuits & Systems
KVL, KCL, Thevenin, op-amps
Semester III — IV
Specialization Tracks & Industry Mentors
Data Structures & Algorithms
Trees, graphs, DP — 240 LeetCode problems mapped
VLSI Design Fundamentals
Cadence Virtuoso, CMOS layout, DRC/LVS
Thermodynamics & Fluid Mech
CFD intro, ANSYS Fluent simulation
Machine Learning Studio
Kaggle competitions, PyTorch, 4-week sprint
Full-Stack Development Lab
React, Node.js, PostgreSQL — live deployment
Semester V — VI
Internships, Live Projects & Open Source
Industry Internship — Pune Cluster
8-week placement at partner firms
Distributed Systems
Kafka, Kubernetes, fault tolerance
Capstone Project — Phase I
Problem statement from industry partner, weekly reviews
IoT & Embedded Systems
STM32, FreeRTOS, MQTT, AWS IoT Core
Semester VII — VIII
Placements, Patents & Industry Delivery
Shreya Nambiar — CSE
PLR701
Tata Consultancy Services
Systems Engineer — AI Practice
Rohan Kulkarni — ECE
PLR702
Texas Instruments India
Analog Design Engineer
Priya Subramaniam — ME
PLR703
Cummins India Ltd
Product Development Engineer
Ankit Sharma — CSE
PLR704
Flipkart
SDE-II — Platform
Divya Iyer — AI/ML
PLR705
Microsoft India
ML Engineer — Azure AI
Numbers have names behind them.
Karan Joshi
B.Tech CSE, 2024
"The capstone project was a real system running in production at a Pune logistics startup before I graduated. That's what Amazon asked about in every interview round."
Amazon — SDE I
Meghna Rao
B.Tech ECE, 2024
"VLSI lab at Forge has Cadence Virtuoso licenses. I had taped out a test chip before most colleges had even introduced the subject. That's the difference."
Texas Instruments — Analog Design
Siddharth Patil
M.Tech CSE (Weekend), 2024
"I was a working professional. The weekend MTech let me apply everything on Monday morning. My team noticed the difference before my degree was even complete."
Persistent Systems — Principal Engineer
Not a brochure for everyone.
One answer built for you.
5 questions. 2 minutes. A specific branch, duration, fee estimate, and syllabus link — matched to your exam status, learning mode, and career goal.
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